发明授权
US06429523B1 Method for forming interconnects on semiconductor substrates and structures formed
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在半导体衬底上形成互连的方法和形成的结构
- 专利标题: Method for forming interconnects on semiconductor substrates and structures formed
- 专利标题(中): 在半导体衬底上形成互连的方法和形成的结构
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申请号: US09755899申请日: 2001-01-04
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公开(公告)号: US06429523B1公开(公告)日: 2002-08-06
- 发明人: Panayotis Constantinou Andricacos , Cyril Cabral, Jr. , John Michael Cotte , Lynne Gignac , Wilma Jean Horkans , Kenneth Parker Rodbell
- 申请人: Panayotis Constantinou Andricacos , Cyril Cabral, Jr. , John Michael Cotte , Lynne Gignac , Wilma Jean Horkans , Kenneth Parker Rodbell
- 主分类号: H01L2348
- IPC分类号: H01L2348
摘要:
A method for forming metal interconnect in a semiconductor structure and the structure formed are disclosed. In the method, a seed layer of a first metal is first deposited into an interconnect opening wherein the seed layer has an average grain size of at least 0.0005 &mgr;m. The semiconductor structure is then annealed at a temperature sufficient to grow the average grain size in the seed layer to at least the film thickness. A filler layer of a second metal is then deposited to fill the interconnect opening overlaying the seed layer such that the filler layer has an average grain size of larger than 0.0005 &mgr;m and comparable to the annealed seed layer.
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