发明授权
US06440868B1 Metal gate with CVD amorphous silicon layer and silicide for CMOS devices and method of making with a replacement gate process 失效
具有CVD非晶硅层的金属栅极和用于CMOS器件的硅化物和用替代栅极工艺制造的方法

  • 专利标题: Metal gate with CVD amorphous silicon layer and silicide for CMOS devices and method of making with a replacement gate process
  • 专利标题(中): 具有CVD非晶硅层的金属栅极和用于CMOS器件的硅化物和用替代栅极工艺制造的方法
  • 申请号: US09691259
    申请日: 2000-10-19
  • 公开(公告)号: US06440868B1
    公开(公告)日: 2002-08-27
  • 发明人: Paul R. BesserQi XiangMatthew S. Buynoski
  • 申请人: Paul R. BesserQi XiangMatthew S. Buynoski
  • 主分类号: H01L21302
  • IPC分类号: H01L21302
Metal gate with CVD amorphous silicon layer and silicide for CMOS devices and method of making with a replacement gate process
摘要:
A semiconductor structure and method for making the same provides a metal gate on a silicon substrate. The gate includes a high dielectric constant on the substrate, and a chemical vapor deposited layer of amorphous silicon on the high k gate dielectric. The metal is then deposited on the CVD amorphous silicon layer. An annealing process forms silicide in the gate, with a layer of silicon remaining unreacted. The work function of the metal gate is substantially the same as a polysilicon gate due to the presence of the CVD amorphous silicon layer.
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