发明授权
- 专利标题： Low hold time statisized dynamic flip-flop
- 专利标题（中）： 低保持时间统计动态触发器
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申请号： US09876765申请日： 2001-06-07
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公开(公告)号： US06448829B1公开(公告)日： 2002-09-10
- 发明人: Ritesh Saraf
- 申请人： Ritesh Saraf
- 主分类号： H03K312
- IPC分类号： H03K312
摘要：
A low hold time flip-flop that has a dynamic input stage and a static output stage is provided. The flip-flop uses a feedback stage to maintain a value on a dynamic node during an evaluation phase of the flip-flop so that an input to the flip-flop only has to be held for a relatively short period of time after the start of the evaluation phase.
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