A scan chain latch circuit is provided. The scan chain latch circuit includes a first shift register latch, a second shift register latch, and a third shift register latch. A first multiplexor is connected between the first and second shift register latches, and a second multiplexor is connected between the second and third shift register latches. Each multiplexor is configured for implementing a jump mode such that a logic value may be passed via the first multiplexor from the first shift register latch to the third shift register latch.