- 专利标题: Semiconductor memory device capable of repairing small leak failure
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申请号: US09793768申请日: 2001-02-27
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公开(公告)号: US06466506B2公开(公告)日: 2002-10-15
- 发明人: Toru Shiomi
- 申请人: Toru Shiomi
- 优先权: JP2000-281397 20000918
- 主分类号: G11C800
- IPC分类号: G11C800
摘要:
A power supply potential GNDP as a substrate potential of two N-channel MOS transistors constructing an SRAM transistor memory cell is enabled to be controlled independent of a ground potential GNDM as a source potential of the N-channel MOS transistors. In the case where a standby current failure occurs, by weakening the driving ability of the N-channel MOS transistors by a substrate effect, the failure can be found in a functional test. A defective memory cell as a cause of the standby current failure, in which a small leak occurs can be specified and is replaced by a redundant memory cell, thereby enabling the yield to be improved.
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