发明授权
US06476653B1 DLL circuit adjustable with external load 有权
DLL电路可通过外部负载进行调节

  • 专利标题: DLL circuit adjustable with external load
  • 专利标题(中): DLL电路可通过外部负载进行调节
  • 申请号: US09774172
    申请日: 2001-02-01
  • 公开(公告)号: US06476653B1
    公开(公告)日: 2002-11-05
  • 发明人: Yasurou Matsuzaki
  • 申请人: Yasurou Matsuzaki
  • 优先权: JP10-229657 19980814
  • 主分类号: H03L706
  • IPC分类号: H03L706
DLL circuit adjustable with external load
摘要:
The present invention provides a DLL circuit performing a phase adjustment in accordance to an output load, and capable of adjusting the phase in a shot time. In the present invention, in a delayed lock loop (DLL) circuit that generates a control clock having a prescribed phase relationship with a reference clock by delaying the reference clock, the operating delay time of an output buffer is measured and the timing of the control clock is adjusted in accordance with this operating delay time. As a result, the timing of the output clock of the first variable delay circuit delay circuit is adjusted in accordance with the magnitude of the external load. This output clock or the output clock of a separate variable delay circuit subject to the same delay control is then utilized as a control clock.
信息查询
0/0