发明授权
- 专利标题: Boosted voltage generating circuit and semiconductor memory device having the same
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申请号: US09864181申请日: 2001-05-25
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公开(公告)号: US06487120B2公开(公告)日: 2002-11-26
- 发明人: Toru Tanzawa , Takeshi Miyaba , Shigeru Atsumi
- 申请人: Toru Tanzawa , Takeshi Miyaba , Shigeru Atsumi
- 优先权: JP2000-154983 20000525
- 主分类号: G11C1604
- IPC分类号: G11C1604
摘要:
There are provided a boosted voltage generating circuit and a semiconductor memory device having the boosted voltage generating circuit which includes a booster circuit for outputting high voltage obtained by boosting the power supply voltage, a regulator circuit supplied with the high voltage, for generating voltage whose voltage value is smaller than the value of the high voltage and which is variably set to at least two values based on the high voltage at the operating time, and a equalizer circuit connected to the booster circuit and regulator circuit, for short-circuiting an output node of the booster circuit and an output node of the regulator circuit in response to a first control signal, wherein the operative period of the regulator circuit and the short-circuiting operation period of the equalizer circuit do not overlap each other.
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