A method for fabricating a semiconductor integrated circuit device including a memory cell of a MISFET and a capacitor element formed in a memory cell-forming region of a semiconductor substrate, and an n channel-type MISFET and a p channel-type MISFET in a peripheral circuit-forming region, including: forming a gate insulating film on a semiconductor substrate; forming a polysilicon film and a high melting metal film on the gate insulating film, patterning to form a gate electrode in a memory cell-forming region and in a peripheral circuit-forming region, respectively; removing the high melting metal film from the gate electrode of the peripheral circuit-forming region; and depositing a metal layer over the peripheral circuit-forming region, followed by thermal treatment to form a silicide film on the polysilicon film in the gate electrode and a high concentration diffusion layer of the peripheral circuit-forming region.