发明授权
- 专利标题: Nonvolatile memory system
- 专利标题(中): 非易失性存储器系统
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申请号: US10011723申请日: 2001-12-11
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公开(公告)号: US06507520B2公开(公告)日: 2003-01-14
- 发明人: Tetsuya Tsujikawa , Atsushi Nozoe , Michitaro Kanamitsu , Shoji Kubono , Eiji Yamamoto , Ken Matsubara
- 申请人: Tetsuya Tsujikawa , Atsushi Nozoe , Michitaro Kanamitsu , Shoji Kubono , Eiji Yamamoto , Ken Matsubara
- 优先权: JP10-32776 19980216
- 主分类号: G11C1604
- IPC分类号: G11C1604
摘要:
Externally supplied program data is latched into data latch circuits DLL and DLR. A judgment is made as to whether or not the latched program data corresponds to any threshold value of multi-levels every time each of plural programing operations is carried out. The program control information corresponding to the judgment result is latched into a sense latch circuit SL. Based upon the latched program control information, the programing operation for setting threshold voltages having multi-levels to a memory cell is carried out in a stepwise manner. Even when the programing operation is ended, the externally supplied program data is left in the data latch circuit. Even when the programing operation of the memory cell is retried due to the overprograming condition, the program data is no longer required to be again received from the external device.
公开/授权文献
- US20020044485A1 Semiconductor, memory card, and data processing system 公开/授权日:2002-04-18
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