The present invention provides a method for fabricating a semiconductor device that can be applied in system on chip (SOC), comprising: providing a substrate with a memory cell region and a peripheral circuit region; forming a plurality of bit-lines in the memory cell region; forming a first and a second dielectric layers respectively in the memory cell region and the peripheral circuit region; and forming a plurality of gates. Next, a blanket ion implantation step is performed to form a plurality of P type LDDs in the substrate besides the gates in a PMOS device region within the peripheral circuit region, without forming an anti-punch through region in the substrate of the memory cell region. Afterwards, a plurality of spacers are formed, connected to one another. An ion implantation step is performed to form a plurality of P type source/drain regions.