发明授权
US06525397B1 Extended drain MOSFET for programming an integrated fuse element to high resistance in low voltage process technology
有权
扩展漏极MOSFET,用于在低电压工艺技术中将集成保险丝元件编程为高电阻
- 专利标题: Extended drain MOSFET for programming an integrated fuse element to high resistance in low voltage process technology
- 专利标题(中): 扩展漏极MOSFET,用于在低电压工艺技术中将集成保险丝元件编程为高电阻
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申请号: US09376161申请日: 1999-08-17
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公开(公告)号: US06525397B1公开(公告)日: 2003-02-25
- 发明人: Alexander Kalnitsky , Pavel Poplevine , Albert Bergemont
- 申请人: Alexander Kalnitsky , Pavel Poplevine , Albert Bergemont
- 主分类号: H01L2900
- IPC分类号: H01L2900
摘要:
An integrated fuse element is capable of being programmed to high resistance in low voltage process technology. The fuse includes a stack of an undoped polysilicon layer and a silicide layer. A voltage applied across the stack is increases until a first agglomeration event occurs, whereby a discontinuity is formed in the silicide layer. The current is further increased to cause a second agglomeration event whereby the size of the discontinuity is increased. Each agglomeration event increases the resistance of the fuse. An extended-drain MOS transistor, capable of sustaining high voltage, is connected in series with the fuse for programming the fuse. The transistor includes: a well region in a substrate, the well region forming the drain of the transistor; an insulating trench in the well; and a polysilicon gate extending over a portion of the substrate, a portion of the well and a portion of the trench, wherein upon reverse-biasing the junction between the well and the substrate a depletion region is formed which encompasses at least the entire portion of the surface region of the well over which the polysilicon extends.
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