发明授权
- 专利标题: Intermetal dielectric layer for integrated circuits
- 专利标题(中): 用于集成电路的金属间电介质层
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申请号: US10135330申请日: 2002-04-29
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公开(公告)号: US06528886B2公开(公告)日: 2003-03-04
- 发明人: Huang Liu , John Sudijono , Juan Boon Tan , Edwin Goh , Alan Cuthbertson , Arthur Ang , Feng Chen , Qiong Li , Peter Chew
- 申请人: Huang Liu , John Sudijono , Juan Boon Tan , Edwin Goh , Alan Cuthbertson , Arthur Ang , Feng Chen , Qiong Li , Peter Chew
- 主分类号: H01L2348
- IPC分类号: H01L2348
摘要:
An intermetal dielectric structure for integrated circuits is provided having a premetal dielectric and a metal line thereon, with a SRO liner on the premetal dielectric layer and the metal lines, a FGS dielectric layer over the SRO liner, a SRO film over the FGS dielectric layer, and a TEOS dielectric layer over the SRO film. Vias through the FGS dielectric layer are treated to have fluorine-free regions around the vias. The structure is not subject to fluorine attack on the metal lines or vias while having a stable FGS dielectric layer with less fluorine out-gassing and out-diffusion.
公开/授权文献
- US20020130418A1 Intermetal dielectric layer for integrated circuits 公开/授权日:2002-09-19
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