Invention Grant
- Patent Title: Method for fabricating a semiconductor device reducing junction leakage current and narrow width effect
- Patent Title (中): 制造半导体器件的方法,减少结漏电流和窄宽度效应
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Application No.: US09870298Application Date: 2001-05-30
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Publication No.: US06537888B2Publication Date: 2003-03-25
- Inventor: Jae-kyu Lee
- Applicant: Jae-kyu Lee
- Priority: KR2000-43009 20000726
- Main IPC: H01L2176
- IPC: H01L2176

Abstract:
A semiconductor device for reducing junction leakage current and mitigating the narrow width effect, and a fabrication method thereof, are provided. The semiconductor device includes a semiconductor substrate in which an active region and an isolation region including a trench are formed, a spacer which is formed on both sidewalls of the trench, a channel stop impurity region which is self-aligned by the spacer and locally formed only at the lower portion of the isolation region, an isolation insulating layer in which the trench is buried, and a gate pattern which is formed on the isolation insulating layer and the active region. When the channel stop impurity region is formed only at the lower portion of the isolation region, isolation characteristics between unit cells can be improved, and also, a junction leakage current can be reduced. Further, the present invention can reduce a narrow width effect, in which a threshold voltage rapidly decreases as a channel width becomes narrower, owing to the formation of the channel stop impurity region on the edges of the active region.
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