SEMICONDUCTOR DEVICE INCLUDING GATE OPENINGS
    1.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING GATE OPENINGS 审中-公开
    半导体器件,包括栅极开口

    公开(公告)号:US20120280291A1

    公开(公告)日:2012-11-08

    申请号:US13463197

    申请日:2012-05-03

    Abstract: According to example embodiments, a semiconductor device includes a substrate, a device isolation layer over the substrate that defines an active region of the substrate, a gate electrode crossing over the active region in between a source region and a drain region of the active region. The gate electrode defines at least one gate opening. The at least one gate opening may expose a portion of a boundary between the active region and the device isolation layer.

    Abstract translation: 根据示例性实施例,半导体器件包括衬底,衬底上的器件隔离层,其限定衬底的有源区;栅电极,跨过有源区的源区和漏区之间的有源区。 栅电极限定至少一个栅极开口。 至少一个门开口可以暴露活性区域和器件隔离层之间的边界的一部分。

    Image scanning apparatus and method
    2.
    发明申请
    Image scanning apparatus and method 有权
    图像扫描装置及方法

    公开(公告)号:US20110134446A1

    公开(公告)日:2011-06-09

    申请号:US12926777

    申请日:2010-12-08

    CPC classification number: H04N1/024 H04N1/40056 H04N1/401

    Abstract: The image scanning apparatus includes a light source including at least one light emitting diode (LED) to irradiate light to a document which is a scan target, a light source control unit to control a lighting-up point of time of the light source, an image sensor to transform an image formed by light reflected from the document into an electric signal according to a result of controlling the lighting-up point of time, and an output unit to output image data corresponding to the transformed electric signal.

    Abstract translation: 图像扫描装置包括:光源,其包括至少一个用于将光照射到作为扫描对象的原稿的发光二极管(LED);光源控制单元,用于控制光源的点亮时间点; 图像传感器,用于根据控制点亮时间点的结果将由文档反射的光形成的图像变换为电信号;以及输出单元,输出与变换后的电信号对应的图像数据。

    HOST APPARATUS, IMAGE SCANNING APPARATUS, IMAGE SCANNING METHODS THEREOF AND COMPUTER READABLE RECORDING MEDIUM
    4.
    发明申请
    HOST APPARATUS, IMAGE SCANNING APPARATUS, IMAGE SCANNING METHODS THEREOF AND COMPUTER READABLE RECORDING MEDIUM 审中-公开
    主机装置,图像扫描装置,图像扫描方法及计算机可读记录介质

    公开(公告)号:US20130016408A1

    公开(公告)日:2013-01-17

    申请号:US13547678

    申请日:2012-07-12

    Applicant: Jae-kyu Lee

    Inventor: Jae-kyu Lee

    CPC classification number: H04N1/40075

    Abstract: A host apparatus includes a display unit configured to display a user interface (UI) window for an image scanning apparatus, a control unit configured to elevate and determine an optical scanning resolution of the image scanning apparatus according to Moire-related information when a scanning resolution is input and a Moire removing function is selected, in the UI window, and control the image scanning apparatus to perform a scanning operation according to the determined optical scanning resolution, a communication interface unit configured to receive a scanned image scanned with the optical scanning resolution in the image scanning apparatus, a filtering unit configured to remove a halftoning screen pattern from the received scanned image, and a sampling unit configured to down-sample the filtered scanned image with the input scanning resolution.

    Abstract translation: 主机装置包括:显示单元,被配置为显示用于图像扫描装置的用户界面(UI)窗口;控制单元,被配置为当扫描分辨率时根据莫尔相关信息提升和确定图像扫描设备的光学扫描分辨率 在UI窗口中选择莫尔去除功能,并且根据所确定的光学扫描分辨率控制图像扫描装置执行扫描操作;通信接口单元,被配置为接收以光学扫描分辨率扫描的扫描图像 在图像扫描装置中,滤波单元被配置为从接收到的扫描图像中去除半色调屏幕图案,以及采样单元,被配置为以输入的扫描分辨率对经滤波的扫描图像进行下采样。

    Semiconductor device reducing junction leakage current and narrow width effect
    5.
    发明授权
    Semiconductor device reducing junction leakage current and narrow width effect 有权
    半导体器件减少结漏电流和窄幅度效应

    公开(公告)号:US06740954B2

    公开(公告)日:2004-05-25

    申请号:US10357017

    申请日:2003-02-03

    Applicant: Jae-kyu Lee

    Inventor: Jae-kyu Lee

    CPC classification number: H01L29/1033 H01L21/76235 H01L21/76237

    Abstract: A semiconductor device for reducing junction leakage current and mitigating the narrow width effect, and a fabrication method thereof, are provided. The semiconductor device includes a semiconductor substrate in which an active region and an isolation region including a trench are formed, a spacer which is formed on both sidewalls of the trench, a channel stop impurity region which is self-aligned by the spacer and locally formed only at the lower portion of the isolation region, an isolation insulating layer in which the trench is buried, and a gate pattern which is formed on the isolation insulating layer and the active region. When the channel stop impurity region is formed only at the lower portion of the isolation region, isolation characteristics between unit cells can be improved, and also, a junction leakage current can be reduced. Further, the present invention can reduce a narrow width effect, in which a threshold voltage rapidly decreases as a channel width becomes narrower, owing to the formation of the channel stop impurity region on the edges of the active region.

    Abstract translation: 提供了用于减少结漏电流并减轻窄宽度效应的半导体器件及其制造方法。 半导体器件包括其中形成有源区和包括沟槽的隔离区的半导体衬底,形成在沟槽的两个侧壁上的间隔物,通过间隔物自对准并且局部形成的沟道阻挡杂质区 仅在隔离区域的下部,隔离绝缘层,沟槽被埋入其中,以及形成在隔离绝缘层和有源区上的栅极图案。 当通道阻挡杂质区只形成在隔离区的下部时,能够提高单位电池之间的隔离特性,并且还可以降低结漏电流。 此外,由于在有源区域的边缘上形成沟道截止杂质区域,本发明可以减小阈值电压随着沟道宽度变窄而急剧减小的窄宽度效应。

    Method for fabricating a semiconductor device reducing junction leakage current and narrow width effect
    7.
    发明授权
    Method for fabricating a semiconductor device reducing junction leakage current and narrow width effect 失效
    制造半导体器件的方法,减少结漏电流和窄宽度效应

    公开(公告)号:US06537888B2

    公开(公告)日:2003-03-25

    申请号:US09870298

    申请日:2001-05-30

    Applicant: Jae-kyu Lee

    Inventor: Jae-kyu Lee

    CPC classification number: H01L29/1033 H01L21/76235 H01L21/76237

    Abstract: A semiconductor device for reducing junction leakage current and mitigating the narrow width effect, and a fabrication method thereof, are provided. The semiconductor device includes a semiconductor substrate in which an active region and an isolation region including a trench are formed, a spacer which is formed on both sidewalls of the trench, a channel stop impurity region which is self-aligned by the spacer and locally formed only at the lower portion of the isolation region, an isolation insulating layer in which the trench is buried, and a gate pattern which is formed on the isolation insulating layer and the active region. When the channel stop impurity region is formed only at the lower portion of the isolation region, isolation characteristics between unit cells can be improved, and also, a junction leakage current can be reduced. Further, the present invention can reduce a narrow width effect, in which a threshold voltage rapidly decreases as a channel width becomes narrower, owing to the formation of the channel stop impurity region on the edges of the active region.

    Abstract translation: 提供了用于减少结漏电流并减轻窄宽度效应的半导体器件及其制造方法。 半导体器件包括其中形成有源区和包括沟槽的隔离区的半导体衬底,形成在沟槽的两个侧壁上的间隔物,通过间隔物自对准并且局部形成的沟道阻挡杂质区 仅在隔离区域的下部,隔离绝缘层,沟槽被埋入其中,以及形成在隔离绝缘层和有源区上的栅极图案。 当通道阻挡杂质区只形成在隔离区的下部时,能够提高单位电池之间的隔离特性,并且还可以降低结漏电流。 此外,由于在有源区域的边缘上形成沟道截止杂质区域,本发明可以减小阈值电压随着沟道宽度变窄而急剧减小的窄宽度效应。

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