- 专利标题: Sense amplifiers having reduced Vth deviation
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申请号: US10050561申请日: 2002-01-18
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公开(公告)号: US06538945B2公开(公告)日: 2003-03-25
- 发明人: Riichiro Takemura , Tsugio Takahashi , Masayuki Nakamura , Ryo Nagai , Norikatsu Takaura , Tomonori Sekiguchi , Shinichiro Kimura
- 申请人: Riichiro Takemura , Tsugio Takahashi , Masayuki Nakamura , Ryo Nagai , Norikatsu Takaura , Tomonori Sekiguchi , Shinichiro Kimura
- 优先权: JP2001-056463 20010301
- 主分类号: G11C700
- IPC分类号: G11C700
摘要:
Providing a semiconductor device which lessen influence of the transistor threshold voltage deviation that is one of noise elements when the sense amplifiers are amplified, and which are capable of accurately sensing and amplifying micro signals having read from the memory cells in the sense amplifiers. In a DRAM chip, P+-type gate PMOSs of P+-type polysilicon gates each having a low impurity density of channel and N+-type gate NMOSs of N+-type polysilicon gates are used in a sense amplifier cross coupling section to further increase substrate voltages of the PMOSs and to decrease substrate voltages of the NMOS. For this reason, a deviation of threshold voltage caused by channel implantation is reduced, and a small signal generated on a data line at a read operation of a low-potential memory array is accurately sensed and amplified by a sense amplifier. In addition, the threshold voltages are increased by a substrate bias effect, and a leakage current in a sense amplifier data holding state is reduced.
公开/授权文献
- US20020122344A1 Sense amplifiers having reduced Vth deviation 公开/授权日:2002-09-05
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