• 专利标题: Manufacture method for semiconductor with small variation in MOS threshold voltage
  • 申请号: US09978598
    申请日: 2001-10-16
  • 公开(公告)号: US06541373B2
    公开(公告)日: 2003-04-01
  • 发明人: Takahisa Yamaha
  • 申请人: Takahisa Yamaha
  • 优先权: JP11-055341 19990303
  • 主分类号: H01L214763
  • IPC分类号: H01L214763
Manufacture method for semiconductor with small variation in MOS threshold voltage
摘要:
After a MOS type transistor is formed on the surface of a semiconductor substrate, an interlayer insulating film covering the transistor is formed. The insulating film includes a silicon oxide film made of hydrogen silsesquioxane resin in a ceramic state. After a wiring layer is formed on the insulating film, a silicon oxide film as a surface protection film is formed on the insulating film, covering the wiring layer. In order to reduce process damages, heat treatment is performed 30 minutes at 400° C. in a nitrogen gas atmosphere. With this heat treatment, hydrogen in the silicon oxide film is released and diffuses into the channel region of the transistor to lower interfacial energy levels. Since the silicon nitride film does not transmit hydrogen, it is not necessary for the heat treatment atmosphere to contain hydrogen. A variation in threshold voltages of MOS type transistors can be easily lowered.
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