Invention Grant
US06545923B2 Negatively biased word line scheme for a semiconductor memory device 失效
用于半导体存储器件的负偏置字线方案

  • Patent Title: Negatively biased word line scheme for a semiconductor memory device
  • Patent Title (中): 用于半导体存储器件的负偏置字线方案
  • Application No.: US09901785
    Application Date: 2001-07-09
  • Publication No.: US06545923B2
    Publication Date: 2003-04-08
  • Inventor: Jae-Yoon SimJei-Hwan Yoo
  • Applicant: Jae-Yoon SimJei-Hwan Yoo
  • Main IPC: G11C808
  • IPC: G11C808
Negatively biased word line scheme for a semiconductor memory device
Abstract:
A memory device utilizing a negatively biased word line scheme diverts word line discharge current from the negative voltage source during a precharge operation, thereby reducing voltage fluctuations and current consumption from the negative voltage source. A main word line, sub-word line, word line enable signal, or other type of word line is coupled to the negative voltage source during a precharge operation. The word line is also coupled to a second power supply during the precharge operation, and then uncoupled from the second power supply after most of the word line discharge current has been diverted. The negative voltage source can then discharge and maintain the word line at a negative bias.
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