A differential pair input receiver (30) having variable reference voltages that may be customized by the designer so as to increase and decrease noise margins of the amplifier. This input receiver (30) includes a complementary self-biased differential amplifier (10) and a dynamic hysteresis voltage reference circuit (20), wherein the complementary self-biased differential amplifier (10) has an input node (Input2), a reference output node (S2), and a dynamic voltage reference node (VDYNREF). The dynamic hysteresis voltage reference circuit (20) connects between the reference output node (S2) and the dynamic voltage reference node (VDYNREF) to provide a reference voltage (Vref) at the dynamic voltage reference node(VDYNREF). The reference voltage (Vref) serves as a threshold for the complementary self-biased differential amplifier (10), such that the output transitions from high-to-low and low-to-high when the input is equal to the reference voltage (Vref). Furthermore, the dynamic hysteresis voltage reference circuit (20) adjusts the reference voltage (Vref) to provide a different threshold for each respective transition from high-to-low and from low-to-high.