- 专利标题: Wiring connection structure of laminated capacitor and decoupling capacitor, and wiring board
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申请号: US09584838申请日: 2000-05-31
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公开(公告)号: US06556420B1公开(公告)日: 2003-04-29
- 发明人: Yasuyuki Naito , Masaaki Taniguchi , Yoichi Kuroda , Haruo Hori , Takanori Kondo
- 申请人: Yasuyuki Naito , Masaaki Taniguchi , Yoichi Kuroda , Haruo Hori , Takanori Kondo
- 优先权: JP11-370802 19991227
- 主分类号: H01G4228
- IPC分类号: H01G4228
摘要:
An apparatus is provided for packaging a laminated capacitor made to have a low ESL value and is used for a decoupling capacitor to be connected to a power supply circuit for a MPU chip providing a MPU. The laminated capacitor is accommodated within a cavity provided on a wiring board. The capacitor includes a plurality of first external terminal electrodes connected to first internal electrodes via a plurality of first feedthrough conductors and a plurality of second external terminal electrodes connected to second internal electrodes via a plurality of second feedthrough conductors. The first external terminal electrodes provided on a first major surface of a capacitor body are connected to via-hole conductors at the hot side for the power source within a substrate, and the second external terminal electrodes provided on first and second major surfaces are connected to grounding via-hole conductors and a mother board within the substrate.
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