发明授权
US06558852B1 Exposure method, reticle, and method of manufacturing semiconductor device
有权
曝光方法,掩模版和制造半导体器件的方法
- 专利标题: Exposure method, reticle, and method of manufacturing semiconductor device
- 专利标题(中): 曝光方法,掩模版和制造半导体器件的方法
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申请号: US09604723申请日: 2000-06-28
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公开(公告)号: US06558852B1公开(公告)日: 2003-05-06
- 发明人: Kazuo Tawarayama , Takuya Kouno
- 申请人: Kazuo Tawarayama , Takuya Kouno
- 优先权: JP11-186713 19990630
- 主分类号: G03F900
- IPC分类号: G03F900
摘要:
An exposure method forms, in a shot area on a reticle, marks to measure arrangement errors that may occur between adjacent device patterns, transfers the marks from the reticle onto a wafer through exposure and development processes using an exposure system, measures arrangement errors according to the marks on the wafer, calculates four error components from the measured arrangement errors, and corrects the exposure system according to the calculated error components. This method eliminates superposition errors from the next exposure process, thereby effectively using the shot areas of exposure systems.
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