Exposure method, reticle, and method of manufacturing semiconductor device
    1.
    发明授权
    Exposure method, reticle, and method of manufacturing semiconductor device 有权
    曝光方法,掩模版和制造半导体器件的方法

    公开(公告)号:US06558852B1

    公开(公告)日:2003-05-06

    申请号:US09604723

    申请日:2000-06-28

    IPC分类号: G03F900

    摘要: An exposure method forms, in a shot area on a reticle, marks to measure arrangement errors that may occur between adjacent device patterns, transfers the marks from the reticle onto a wafer through exposure and development processes using an exposure system, measures arrangement errors according to the marks on the wafer, calculates four error components from the measured arrangement errors, and corrects the exposure system according to the calculated error components. This method eliminates superposition errors from the next exposure process, thereby effectively using the shot areas of exposure systems.

    摘要翻译: 曝光方法在掩模版的拍摄区域中形成标记以测量相邻装置图案之间可能发生的布置误差,通过使用曝光系统的曝光和显影处理将标线转印到晶片上,根据 晶片上的标记根据测量的布置误差计算出四个误差分量,并根据计算的误差分量校正曝光系统。 该方法消除了下一次曝光过程中的叠加误差,从而有效地利用曝光系统的拍摄区域。

    Design system of alignment marks for semiconductor manufacture
    2.
    发明授权
    Design system of alignment marks for semiconductor manufacture 有权
    半导体制造对准标记设计系统

    公开(公告)号:US07100146B2

    公开(公告)日:2006-08-29

    申请号:US10636577

    申请日:2003-08-08

    IPC分类号: G06F17/50

    CPC分类号: G03F9/7092

    摘要: A design system of an alignment mark for manufacturing a semiconductor device includes a memory which stores at least mark data including pattern information regarding plural kinds of marks and process data including condition information of manufacturing processes, and a first process simulator which simulates a substrate structure before patterning based on the process data, the substrate structure being formed in an identified manufacturing process. Moreover, the design system includes a second process simulator which simulates a processed shape of an identified mark after the patterning based on the simulated substrate structure and the process data, the mark formed in the manufacturing process, a signal waveform simulator which simulates a detection signal waveform of the mark, the waveform being obtained from the simulated processed shape of the mark, and a signal evaluation device which evaluates a suitability of the mark for the identified manufacturing process based on the simulated detection signal waveform.

    摘要翻译: 用于制造半导体器件的对准标记的设计系统包括:存储器,其至少存储包括关于多种标记的图案信息的标记数据和包括制造过程的条件信息的处理数据;以及第一处理模拟器,其模拟前面的衬底结构 基于工艺数据构图,基板结构在识别的制造工艺中形成。 此外,设计系统包括第二处理模拟器,其基于模拟的基板结构和处理数据,在制造​​过程中形成的标记,模拟检测信号的信号波形模拟器,模拟图案化之后的识别标记的处理形状 标记的波形,从标记的模拟处理形状获得的波形,以及基于模拟的检测信号波形来评估用于所识别的制造处理的标记的适合性的信号评估装置。

    Aligner evaluation system, aligner evaluation method, a computer program product, and a method for manufacturing a semiconductor device
    3.
    发明授权
    Aligner evaluation system, aligner evaluation method, a computer program product, and a method for manufacturing a semiconductor device 有权
    对准器评估系统,对准器评估方法,计算机程序产品和半导体器件的制造方法

    公开(公告)号:US07546178B2

    公开(公告)日:2009-06-09

    申请号:US11882620

    申请日:2007-08-03

    IPC分类号: G06F19/00 G06F17/50

    摘要: An aligner evaluation system includes (a) an error calculation module configured to calculate error information on mutual optical system errors among a plurality of aligners; (b) a simulation module configured to simulate device patterns to be delineated by each of the aligners based on the error information; and (c) a evaluation module configured to evaluate whether each of the aligners has appropriate performances for implementing an organization of a product development machine group based on the simulated device pattern.

    摘要翻译: 对准器评估系统包括:(a)误差计算模块,被配置为计算多个对准器之间的相互光学系统误差的误差信息; (b)模拟模块,被配置为基于所述误差信息来模拟由每个对准器描绘的装置模式; 以及(c)评估模块,其被配置为基于所述模拟设备模式来评估每个对准器是否具有用于实现产品开发机器组的组织的适当性能。

    Aligner evaluation system, aligner evaluation method, a computer program product, and a method for manufacturing a semiconductor device
    4.
    发明申请
    Aligner evaluation system, aligner evaluation method, a computer program product, and a method for manufacturing a semiconductor device 有权
    对准器评估系统,对准器评估方法,计算机程序产品和半导体器件的制造方法

    公开(公告)号:US20070288113A1

    公开(公告)日:2007-12-13

    申请号:US11882620

    申请日:2007-08-03

    IPC分类号: G06F19/00 G06F17/50

    摘要: An aligner evaluation system includes (a) an error calculation module configured to calculate error information on mutual optical system errors among a plurality of aligners; (b) a simulation module configured to simulate device patterns to be delineated by each of the aligners based on the error information; and (c) a evaluation module configured to evaluate whether each of the aligners has appropriate performances for implementing an organization of a product development machine group based on the simulated device pattern.

    摘要翻译: 对准器评估系统包括:(a)误差计算模块,被配置为计算多个对准器之间的相互光学系统误差的误差信息; (b)模拟模块,被配置为基于所述误差信息来模拟由每个对准器描绘的装置模式; 以及(c)评估模块,其被配置为基于所述模拟设备模式来评估每个对准器是否具有用于实现产品开发机器组的组织的适当性能。

    Alignment apparatus, aberration measuring method and aberration
measuring mark
    7.
    发明授权
    Alignment apparatus, aberration measuring method and aberration measuring mark 失效
    对准装置,像差测量方法和像差测量标记

    公开(公告)号:US6163376A

    公开(公告)日:2000-12-19

    申请号:US413859

    申请日:1999-10-07

    CPC分类号: G03F9/7088 G03F7/706

    摘要: In an alignment apparatus, an alignment mark formed on a substrate is illuminated through an illuminating optical system, and an image of the alignment mark is projected onto a light receiving surface of a CCD camera through an enlarging optical system. The enlarging optical system includes a parallel flat plate, the inclination of which can be adjustable, for parallel-translating an eccentric component of coma.

    摘要翻译: 在对准装置中,通过照明光学系统照射形成在基板上的对准标记,并且通过放大光学系统将对准标记的图像投影到CCD照相机的受光面上。 放大光学系统包括平行平板,其平移平面可以调节,用于平行平移偏心偏心分量。