Apparatus for reducing charge kickback in a dynamic comparator

发明授权

US06559787B1 Apparatus for reducing charge kickback in a dynamic comparator 有权

标题翻译：用于在动态比较器中减少电荷反冲的装置

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专利标题： Apparatus for reducing charge kickback in a dynamic comparator
专利标题（中）： 用于在动态比较器中减少电荷反冲的装置
申请号： US09911233

申请日： 2001-07-23
公开(公告)号： US06559787B1

公开(公告)日： 2003-05-06
发明人: Arlo J. Aude , Laurence D. Lewicki , Jitendra Mohan
申请人： Arlo J. Aude , Laurence D. Lewicki , Jitendra Mohan
主分类号： H03M138
IPC分类号： H03M138

Apparatus for reducing charge kickback in a dynamic comparator

摘要：

There is disclosed a comparator comprising: 1) a first comparison circuit capable of receiving an input signal, wherein the first comparison circuit is enabled and compares the signal when a received LATCH signal is enabled and is disabled when the received LATCH signal is disabled; and 2) a second comparison circuit coupled to the input signal in parallel with the first comparison circuit, wherein an input stage of the second comparison circuit is substantially identical to an input stage of the first comparison circuit. The second comparison circuit is enabled and compares the input signal when the received LATCH is signal is disabled and is disabled when the received LATCH signal is enabled.

摘要（中）：

公开了一种比较器，包括：1）能够接收输入信号的第一比较电路，其中所述第一比较电路被使能，并且当所接收的LATCH信号被使能时将所述信号进行比较，并且当所接收的LATCH信号被禁止时被禁用; 以及2）与所述第一比较电路并联耦合到所述输入信号的第二比较电路，其中所述第二比较电路的输入级基本上与所述第一比较电路的输入级相同。当接收的LATCH信号被禁止时，第二比较电路被使能并比较输入信号，并且当所接收的LATCH信号被使能时被禁止。

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