发明授权
US06569742B1 Method of manufacturing semiconductor integrated circuit device having silicide layers
有权
制造具有硅化物层的半导体集成电路器件的方法
- 专利标题： Method of manufacturing semiconductor integrated circuit device having silicide layers
- 专利标题（中）： 制造具有硅化物层的半导体集成电路器件的方法
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申请号： US09471321申请日： 1999-12-23
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公开(公告)号： US06569742B1公开(公告)日： 2003-05-27
- 发明人: Yasuhiro Taniguchi , Shoji Shukuri , Kenichi Kuroda , Shuji Ikeda , Takashi Hashimoto
- 申请人： Yasuhiro Taniguchi , Shoji Shukuri , Kenichi Kuroda , Shuji Ikeda , Takashi Hashimoto
- 优先权： JP10-369017 19981225
- 主分类号： H01L21336
- IPC分类号： H01L21336
摘要：
A MISFET capable of a high speed operation includes a metal silicide layer in a high concentration region aligned with a gate side wall layer on a self-alignment basis. A MISFET which can be driven at a high voltage includes an LDD portion having a width greater than the width of the side wall layer, a high concentration region in contact with the LDD portion and a metal silicide layer in the high concentration region.
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