发明授权
US06570211B1 2Bit/cell architecture for floating gate flash memory product and associated method 有权
2Bit /单元架构的浮栅闪存产品及相关方法

  • 专利标题: 2Bit/cell architecture for floating gate flash memory product and associated method
  • 专利标题(中): 2Bit /单元架构的浮栅闪存产品及相关方法
  • 申请号: US10180673
    申请日: 2002-06-26
  • 公开(公告)号: US06570211B1
    公开(公告)日: 2003-05-27
  • 发明人: Yue-song HeRichard FastowZheng Wei
  • 申请人: Yue-song HeRichard FastowZheng Wei
  • 主分类号: H01L2976
  • IPC分类号: H01L2976
2Bit/cell architecture for floating gate flash memory product and associated method
摘要:
The invention relates to a flash memory devices and a method associated therewith in which combined source/drain regions are shared by more than two memory cells. For example, source/drain regions can be shared by four adjacent memory cells. Such sharing can be accomplished by providing memory cells along main branches of word lines and additional memory cells along dead end branches extending off the main branches. Another aspect of the invention relates to a flash memory device wherein the memory cells are arrayed and a first portion of the memory cells are read with source and drain regions sharing a row of the array and a second portion of the memory cells are read with source and drain regions sharing a column of the array.
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