A method of forming a floating gate electrode of a cell of a flash memory device having an interval less than a critical dimension (CD) in a conventional photolithographic process, in which the reliability of a dielectric layer does not deteriorate and damage to a floating gate electrode during etching is prevented, is provided. According to the present invention, a protective layer formed of a material having a high etching selectivity with respect to a device isolation layer and a doped polysilicon layer is formed on the upper surface of the doped polysilicon layer forming the floating gate electrode. The protective layer is partially etched and includes a recess. Next, a material layer for forming a spacer, which is formed of a material having a high etching selectivity with respect to the device isolation layer and the doped polysilicon layer, is formed on the upper surface of the protective layer and is etched back, thus forming the spacer. Damage to the doped polysilicon layer during etching is prevented by the protective layer containing the recess. The floating gate electrode, which is arranged at an interval less than a limit value in a photolithographic process, can be formed by the spacer. The spacer and the protective layer are removed, and a step difference does not occur at edges of the floating gate electrode. Thus deterioration of the reliability of a dielectric layer formed on top of the floating gate electrode can be prevented.