Invention Grant
- Patent Title: Method of manufacturing an EEPROM device
- Patent Title (中): 制造EEPROM器件的方法
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Application No.: US10251850Application Date: 2002-09-23
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Publication No.: US06576512B2Publication Date: 2003-06-10
- Inventor: Yasuhiro Taniguchi , Shoji Shukuri , Kenichi Kuroda , Shuji Ikeda , Takashi Hashimoto
- Applicant: Yasuhiro Taniguchi , Shoji Shukuri , Kenichi Kuroda , Shuji Ikeda , Takashi Hashimoto
- Priority: JP10-369017 19981225
- Main IPC: H01L21336
- IPC: H01L21336
Abstract:
A MISFET capable of a high speed operation includes a metal silicide layer in a high concentration region aligned with a gate side wall layer on a self-alignment basis. A MISFET which can be driven at a high voltage includes an LDD portion having a width greater than the width of the side wall layer, a high concentration region in contact with the LDD portion and a metal silicide layer in the high concentration region.
Public/Granted literature
- US20030022445A1 Semiconductor integrated circuit device and a method of manufacturing the same Public/Granted day:2003-01-30
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