发明授权
- 专利标题: Multiprocessor system
- 专利标题(中): 多处理器系统
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申请号: US09820948申请日: 2001-03-30
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公开(公告)号: US06587922B2公开(公告)日: 2003-07-01
- 发明人: Tatsuo Higuchi , Shinichi Kawamoto , Naoki Hamanaka
- 申请人: Tatsuo Higuchi , Shinichi Kawamoto , Naoki Hamanaka
- 优先权: JP2000-094780 20000330
- 主分类号: G06F1208
- IPC分类号: G06F1208
摘要:
A multiprocessor system can reduce a broadcast for cache memory consistency control with memory access from an I/O device. The multiprocessor system is provided with a cache memory identifier or an owner tag, and a block length table for recording a memory write block length of the I/O device. The cache memory identifier records that the cache has an exclusive copy. The owner tag records that there is no cache memory having an exclusive copy. If there is an exclusive copy during read through the I/O device, a read request is issued to both a cache holding the copy and a memory. If it is recorded that the copy is not present, data are directly read from the memory. Moreover, when a write block length is recorded in the block length table during write, whole blocks are collected to issue a request for invalidation from the cache and the request is directly written to the memory after the invalidation is completed.
公开/授权文献
- US20020013886A1 Multiprocessor system 公开/授权日:2002-01-31
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