发明授权
- 专利标题: Testing apparatus and testing method for semiconductor integrated circuit
- 专利标题(中): 半导体集成电路测试仪器及测试方法
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申请号: US09663700申请日: 2000-09-15
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公开(公告)号: US06593765B1公开(公告)日: 2003-07-15
- 发明人: Masahiro Ishida , Takahiro Yamaguchi , Yoshihiro Hashimoto
- 申请人: Masahiro Ishida , Takahiro Yamaguchi , Yoshihiro Hashimoto
- 优先权: JP11-263472 19990917
- 主分类号: G01R3126
- IPC分类号: G01R3126
摘要:
A testing apparatus is able to test a semiconductor integrated circuit with high observability. The testing apparatus includes a test pattern inputting means 14 for inputting a test pattern for activating a path under test of a semiconductor integrated circuit 20 to the semiconductor integrated circuit, a transient power supply current measuring means 16 for measuring transient power supply current supplied to the semiconductor integrated circuit while the path under test is being activated, and a fault detecting means 34 for judging absence and presence of a fault of the path under test, based on transient power supply current measured by the transient power supply current measuring means.
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