发明授权
US06598216B2 Method for enhancing a power bus in I/O regions of an ASIC device 失效
用于增强ASIC设备的I / O区域中的电力总线的方法

Method for enhancing a power bus in I/O regions of an ASIC device
摘要:
A method for enhancing power bus for I/O libraries in ASIC designs is disclosed. An I/O assignment for I/O circuits to be utilized in an ASIC design is initially generated. Each I/O circuit may obtain power from either a primary I/O power bus or a secondary I/O power bus. A determination is then made as to whether or not the I/O assignment meets certain predetermined power distribution requirements. In a determination that the I/O assignment does not meet the predetermined power bus distribution requirements, a power enhancement cell is added. The power enhancement circuit includes at least one metal line for connecting the primary I/O power bus to the secondary I/O power bus in order for the I/O assignment to meet the power bus distribution requirements.
信息查询
0/0