• 专利标题: Semiconductor memory device having redundancy system
  • 申请号: US10045780
    申请日: 2002-01-11
  • 公开(公告)号: US06603689B2
    公开(公告)日: 2003-08-05
  • 发明人: Daisuke KatoYohji Watanabe
  • 申请人: Daisuke KatoYohji Watanabe
  • 优先权: JP2001-005562 20010112
  • 主分类号: G11C700
  • IPC分类号: G11C700
Semiconductor memory device having redundancy system
摘要:
A semiconductor memory device having a memory system and a redundancy system including redundant elements for repairing a plurality of defects in the memory system, comprising a plurality of address fuse sets each including address fuses for programming a defective address in the memory system, and a master fuse for preventing a corresponding redundant element from being selected when the redundant element is not used, wherein at least one master fuse is shared by at least two fuse sets among the plurality of address fuse sets.
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