Invention Grant
- Patent Title: Method for forming barrier layers for solder bumps
- Patent Title (中): 用于形成焊料凸块的阻挡层的方法
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Application No.: US10006367Application Date: 2001-12-10
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Publication No.: US06613663B2Publication Date: 2003-09-02
- Inventor: Akira Furuya
- Applicant: Akira Furuya
- Priority: JP2000-374517 20001208
- Main IPC: H01L2144
- IPC: H01L2144

Abstract:
A method for manufacturing a semiconductor device: forming a seed layer 22 on a semiconductor substrate 10 having a pad electrode 14; forming a protective layer 24 on the seed layer 22; forming a mask 30 having an opening 40 on the protective layer 24 above the pad electrode; etching the protective layer 24 exposed in the opening 40 to expose the seed layer 22; depositing a plating film 50 serving as a barrier metal on the seed layer 22; and forming a solder bump on the plating film 50. The seed layer is covered with the protective layer, and the protective layer 24 is selectively removed with respect to the seed layer 22 immediately before the plating step. As a result, it is possible to prevent the oxidation of the seed layer 22 in the step after the formation of the protective layer.
Public/Granted literature
- US20020072215A1 Method for forming barrier layers for solder bumps Public/Granted day:2002-06-13
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