公开(公告)号：US09543182B2

公开(公告)日：2017-01-10

申请号：US13305139

申请日：2011-11-28

Applicant: Akira Furuya ,  Takamitsu Kitamura

Inventor： Akira Furuya ,  Takamitsu Kitamura

IPC: H01L21/683

CPC classification number: H01L21/6833

Abstract: An electrostatic chuck device including: a plurality of adsorption areas having an electrode generating electrostatic attractive force; and a control portion controlling the electrostatic attractive force against each of the plurality of the adsorption areas independently of other adsorption areas.

Abstract translation: 一种静电吸盘装置，包括：具有产生静电吸引力的电极的多个吸附区域; 以及控制部分，其独立于其他吸附区域控制对所述多个吸附区域中的每一个的静电吸引力。

公开(公告)号：US08642472B2

公开(公告)日：2014-02-04

申请号：US13495586

申请日：2012-06-13

Applicant: Akira Furuya

Inventor： Akira Furuya

IPC: H01L21/44

CPC classification number: H01L23/485 ,  H01L21/2885 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/76856 ,  H01L21/76867 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76898 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A generation of a void in a recessed section is inhibited. A method for manufacturing a semiconductor device includes: an operation of forming recessed sections in an insulating film, which is formed on a semiconductor substrate; an operation of forming a seed film in the recessed section; an operation of forming a cover metal film in the recessed section; an operation of selectively removing the cover metal film to expose the seed film over the bottom section of the recessed section; and an operation to carrying out a growth of a plated film to fill the recessed section by utilizing the seed film exposed in the bottom section of the recessed section as a seed.

Abstract translation: 凹陷部分中的空隙的产生被抑制。 一种制造半导体器件的方法包括：形成在半导体衬底上的绝缘膜中形成凹部的操作; 在凹部中形成种子膜的操作; 在凹部中形成覆盖金属膜的动作; 选择性地去除覆盖金属膜以将种子膜暴露在凹部的底部上的操作; 以及通过利用暴露在凹部的底部中的种子膜作为种子来进行镀膜的生长以填充凹部的操作。

公开(公告)号：US08512540B2

公开(公告)日：2013-08-20

申请号：US13044222

申请日：2011-03-09

Applicant: Akira Furuya ,  Yasuaki Tsuchiya

Inventor： Akira Furuya ,  Yasuaki Tsuchiya

IPC: C25D5/00 ,  C25D21/12

CPC classification number: C25D5/00 ,  C25D5/18 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885 ,  H01L21/76849 ,  H01L21/76877

Abstract: An objective of this invention is to reliably form a plating film. The following two steps are sequentially conducted: a first step of connecting a film-formation surface of a wafer 109 to a cathode electrode 107, making the film-formation surface inclined from the surface of a plating solution 103 and immersing the wafer 109 into the plating solution 103 with applying a first current between the cathode electrode 107 and an Cu anode electrode 105 disposed in the plating solution 103, and second step of, after immersing the film-formation surface in the plating solution 103, applying a second current between the cathode electrode 107 and the Cu anode electrode 105 to form a metal film on the film-formation surface by electrolytic plating. In the first step, the first current is controlled on the basis of an inclination angle between the liquid surface and the film-formation surface.

Abstract translation: 本发明的目的是可靠地形成镀膜。 顺序进行以下两个步骤：将晶片109的成膜表面连接到阴极电极107的第一步骤，使得成膜表面从电镀液103的表面倾斜并将晶片109浸入 电镀液103，在阴极电极107和布置在电镀液103中的Cu阳极电极105之间施加第一电流，第二工序在将成膜面浸渍在电镀液103中之后，在第 阴极电极107和Cu阳极电极105，通过电解电镀在成膜面上形成金属膜。 在第一步骤中，基于液体表面和成膜表面之间的倾斜角来控制第一电流。

公开(公告)号：US08477474B2

公开(公告)日：2013-07-02

申请号：US12717643

申请日：2010-03-04

Applicant: Toshiyuki Yoshizawa ,  Akira Furuya ,  Masaomi Ishikura ,  Keisuke Takasugi ,  Hiroshi Take

Inventor： Toshiyuki Yoshizawa ,  Akira Furuya ,  Masaomi Ishikura ,  Keisuke Takasugi ,  Hiroshi Take

IPC: H01G4/00 ,  H01G4/005

CPC classification number: H01G4/33 ,  H01G4/228 ,  H01L23/3142 ,  H01L23/3157 ,  H01L28/75 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/00

Abstract: To provide a thin film capacitor having a device structure for suppressing peeling between an insulating film and a substrate. A thin film capacitor 100 has a laminate structure that is formed by laminating a lower electrode 20, a dielectric film 30, and an upper electrode 40 in sequence on a substrate 10. An adhesion layer 41 is formed on a side surface of the lower electrode 20 via the dielectric film 30, and an insulating film 50 in contact with the adhesion layer 41 covers the laminate structure. According to this device structure, the adhesion layer 41 having excellent adhesiveness to the insulating film 50 is disposed between the insulating film 50 and the dielectric film 30, so that peeling of the insulating film 50 can be suppressed.

Abstract translation: 提供具有抑制绝缘膜和基板之间剥离的器件结构的薄膜电容器。 薄膜电容器100具有依次在基板10上层叠下电极20，电介质膜30和上电极40而形成的层叠结构。在下电极的侧面形成有粘接层41 并且与粘合层41接触的绝缘膜50覆盖层叠结构。 根据该器件结构，在绝缘膜50和电介质膜30之间设置与绝缘膜50具有优异粘合性的粘合层41，从而能够抑制绝缘膜50的剥离。

公开(公告)号：US08222142B2

公开(公告)日：2012-07-17

申请号：US12898165

申请日：2010-10-05

Applicant: Akira Furuya

Inventor： Akira Furuya

IPC: H01L21/44

CPC classification number: H01L23/485 ,  H01L21/2885 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/76856 ,  H01L21/76867 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76898 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A generation of a void in a recessed section is inhibited. A method for manufacturing a semiconductor device includes: an operation of forming recessed sections in an insulating film, which is formed on a semiconductor substrate; an operation of forming a seed film in the recessed section; an operation of forming a cover metal film in the recessed section; an operation of selectively removing the cover metal film to expose the seed film over the bottom section of the recessed section; and an operation to carrying out a growth of a plated film to fill the recessed section by utilizing the seed film exposed in the bottom section of the recessed section as a seed.

Abstract translation: 凹陷部分中的空隙的产生被抑制。 一种制造半导体器件的方法包括：形成在半导体衬底上的绝缘膜中形成凹部的操作; 在凹部中形成种子膜的操作; 在凹部中形成覆盖金属膜的动作; 选择性地去除覆盖金属膜以将种子膜暴露在凹部的底部上的操作; 以及通过利用暴露在凹部的底部中的种子膜作为种子来进行镀膜的生长以填充凹部的操作。

公开(公告)号：US20120134065A1

公开(公告)日：2012-05-31

申请号：US13305139

申请日：2011-11-28

Applicant: Akira Furuya ,  Takamitsu Kitamura

Inventor： Akira Furuya ,  Takamitsu Kitamura

IPC: H01L21/687 ,  H01L21/50

CPC classification number: H01L21/6833

Abstract: An electrostatic chuck device including: a plurality of adsorption areas having an electrode generating electrostatic attractive force; and a control portion controlling the electrostatic attractive force against each of the plurality of the adsorption areas independently of other adsorption areas.

Abstract translation: 一种静电吸盘装置，包括：具有产生静电吸引力的电极的多个吸附区域; 以及控制部分，其独立于其他吸附区域控制对所述多个吸附区域中的每一个的静电吸引力。

公开(公告)号：US20100210102A1

公开(公告)日：2010-08-19

申请号：US12758432

申请日：2010-04-12

Applicant: Akira FURUYA

Inventor： Akira FURUYA

IPC: H01L21/768

CPC classification number: H01L21/76831 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Aimed at improving adhesiveness between upper and lower interconnects in semiconductor devices, a semiconductor device of the present invention includes a second dielectric multi-layered film formed on a substrate, and containing a lower interconnect; a first dielectric multi-layered film formed on the second dielectric multi-layered film, and having a recess; an MOx film formed on the inner wall of the recess, and containing a metal M and oxygen as major components; an M film formed on the MOx film, and containing the M as a major component; and an electric conductor formed on the M film so as to fill the recess, and containing Cu as a major component, wherein the surficial portion of the interconnect fallen straight under the bottom of the recess has an oxygen concentration of 1% or smaller.

Abstract translation: 为了提高半导体器件中的上下互连之间的粘合性，本发明的半导体器件包括形成在基板上并包含下互连的第二介质多层膜; 形成在所述第二电介质多层膜上并具有凹部的第一电介质多层膜; 形成在凹部的内壁上并含有金属M和氧作为主要成分的MOx膜; 形成在MOx膜上并含有M作为主要成分的M膜; 以及形成在M膜上的电导体，以填充凹部，并且包含Cu作为主要成分，其中互连的表面部分在凹部的底部下方直线的氧浓度为1％以下。

公开(公告)号：US07745240B2

公开(公告)日：2010-06-29

申请号：US11826085

申请日：2007-07-12

Applicant: Akira Furuya

Inventor： Akira Furuya

IPC: H01L21/00

CPC classification number: H01L33/0095 ,  H01L33/20 ,  H01L33/22

Abstract: A manufacturing method of a light-emitting element includes emitting a laser light to a division region for separating a light-emitting element formed on a substrate, physically dividing the substrate along the division region, and removing a surface layer on at least one of the side faces of the substrate that is exposed by the dividing of the substrate.

Abstract translation: 发光元件的制造方法包括将激光发射到用于分离形成在基板上的发光元件的分割区域，沿着分割区域物理地分割基板，以及去除至少一个 通过基板的分割曝光的基板的侧面。

公开(公告)号：US20100127404A1

公开(公告)日：2010-05-27

申请号：US12689741

申请日：2010-01-19

Applicant: Akira FURUYA

Inventor： Akira FURUYA

IPC: H01L23/48

CPC classification number: H01L21/31116 ,  H01L21/76831

Abstract: In a method for manufacturing a semiconductor device, insulation resistance of the porous film is stabilized, and leakage current between adjacent interconnects provides an improved reliability in signal propagation therethrough. The method includes: sequentially forming over a semiconductor substrate a porous film and a patterned resist film; forming a concave exposed surface of the substrate; forming a non-porous film covering the interior wall of the concave portion and the porous film; selectively removing the non-porous film from the bottom of the concave portion and the non-porous film by anisotropic etch; forming a barrier metal film covering the porous film and the interior wall; and forming a metallic film on the barrier metal film to fill the concave portion. The anisotropic etch process uses an etching gas with mixing ratio MR, 45≦MR≦100, where MR=((gaseous “nitrogen” containing compound)+(inert gas))/(gaseous “fluorine” containing compound).

Abstract translation: 在制造半导体器件的方法中，多孔膜的绝缘电阻稳定，相邻互连线之间的漏电流提高了信号传播的可靠性。 该方法包括：在半导体衬底上顺序形成多孔膜和图案化抗蚀剂膜; 形成衬底的凹入的暴露表面; 形成覆盖所述凹部的内壁和所述多孔膜的无孔膜; 通过各向异性蚀刻从凹部的底部和非多孔膜选择性地去除无孔膜; 形成覆盖多孔膜和内壁的阻挡金属膜; 并在阻挡金属膜上形成金属膜以填充凹部。 各向异性蚀刻工艺使用混合比为MR，45＆nlE; MR＆nlE; 100的蚀刻气体，其中MR =（（气态“含氮”化合物）+（惰性气体））/（气态“含氟化合物”）。

公开(公告)号：US07675136B2

公开(公告)日：2010-03-09

申请号：US11723925

申请日：2007-03-22

Applicant: Hajime Kuwajima ,  Masahiro Miyazaki ,  Akira Furuya

Inventor： Hajime Kuwajima ,  Masahiro Miyazaki ,  Akira Furuya

IPC: H01L29/00

CPC classification number: H01L27/016

Abstract: A thin-film device incorporates a device main body and four terminal electrodes. The device main body has four side surfaces. The terminal electrodes are disposed to touch respective portions of the side surfaces. The device main body includes a lower conductor layer used to form a first passive element and an upper conductor layer used to form a second passive element. At each side surface of the device main body, an end face of the lower conductor layer and an end face of the upper conductor layer are electrically and physically connected to each other. The terminal electrodes touch the end faces of the lower and upper conductor layers, and are thereby connected to the lower and upper conductor layers.

Abstract translation: 薄膜器件包括器件主体和四个端子电极。 装置主体具有四个侧面。 端子电极被设置成接触侧表面的相应部分。 器件主体包括用于形成第一无源元件的下导体层和用于形成第二无源元件的上导体层。 在器件主体的每个侧表面处，下导体层的端面和上导体层的端面彼此电气和物理地连接。 端子电极接触下导体层和上导体层的端面，从而连接到下导体层和上导体层。