发明授权
- 专利标题: Reducing impedance of power supplying system in a circuit board by connecting two points in one of a power supply pattern and a ground pattern by a resistive member
- 专利标题(中): 通过电阻构件将电源图案和接地图案之一中的两个点连接在电路板中来减小供电系统的阻抗
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申请号: US09361232申请日: 1999-07-27
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公开(公告)号: US06614663B1公开(公告)日: 2003-09-02
- 发明人: Hitoshi Yokota , Tsutomu Hara , Mariko Kasai , Takashi Suga , Hideo Sawada , Hiromu Ishihara
- 申请人: Hitoshi Yokota , Tsutomu Hara , Mariko Kasai , Takashi Suga , Hideo Sawada , Hiromu Ishihara
- 优先权: JP10-213572 19980729
- 主分类号: H05K706
- IPC分类号: H05K706
摘要:
In a circuit board having a multilayer structure comprising a ground pattern and a power-supply pattern both, for example, by forming a plurality of slits along each side of the ground pattern or the power-supply pattern, a long thin conduction path connecting a corner and a side center of the ground pattern is formed and resistive elements are placed in the middles of the conduction path to short, circuit the corner and a side center of the ground pattern. Therefore, portions corresponding to an antinode and a node or antinode and an antinode of a standing wave are short-circuited. The standing wave is generated when electric power is supplied to ICs and LSIs mounted on the circuit board. Thus, noise sources caused by the standing wave cancel each other. As a result, the occurrence of an antiresonance phenomenon and an increase in impedance of the power supplying system caused by the standing wave can be suppressed.
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