发明授权
- 专利标题: Methods of depositing a layer comprising tungsten and methods of forming a transistor gate line
- 专利标题(中): 沉积包含钨的层的方法和形成晶体管栅极线的方法
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申请号: US10243406申请日: 2002-09-13
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公开(公告)号: US06617250B2公开(公告)日: 2003-09-09
- 发明人: Cem Basceri , Garo J. Derderian , Mark R. Visokay , John M. Drynan , Gurtej S. Sandhu
- 申请人: Cem Basceri , Garo J. Derderian , Mark R. Visokay , John M. Drynan , Gurtej S. Sandhu
- 主分类号: H01L21302
- IPC分类号: H01L21302
摘要:
In part, disclosed are semiconductor processing methods, methods of depositing a tungsten comprising layer over a substrate, methods of depositing a tungsten nitride comprising layer over a substrate, methods of depositing a tungsten silicide comprising layer over a substrate, methods of forming a transistor gate line over a substrate, methods of forming a patterned substantially crystalline Ta2O5 comprising material, and methods of forming a capacitor dielectric region comprising substantially crystalline Ta2O5 comprising material. In one implementation, a semiconductor processing method includes forming a substantially amorphous Ta2O5 comprising layer over a semiconductive substrate. The layer is exposed to WF6 under conditions effective to etch substantially amorphous Ta2O5 from the substrate. In one implementation, the layer is exposed to WF6 under conditions effective to both etch substantially amorphous Ta2O5 from the substrate and deposit a tungsten comprising layer over the substrate during the exposing.
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