发明授权
- 专利标题: Wiring circuit substrate and manufacturing method therefor
- 专利标题(中): 接线电路基板及其制造方法
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申请号: US10287633申请日: 2002-11-05
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公开(公告)号: US06646337B2公开(公告)日: 2003-11-11
- 发明人: Tomoo Iijima , Masayuki Ohsawa
- 申请人: Tomoo Iijima , Masayuki Ohsawa
- 优先权: JP11-289277 19991012; JP11-374462 19991228; JP2000-142658 20000516
- 主分类号: H01L2312
- IPC分类号: H01L2312
摘要:
The present invention prepares a member having a potrusion-forming copper foil 21 formed on a conductor-circuit-forming copper layer 23 via an etching-barrier layer 22 formed of a different metal. Etching is selectively performed for the protrusion-forming copper foil 21 by using etchant that does not etch the etching-barrier layer, and protrusions 25 are thereby formed. Then, the etching-barrier layer 22 is removed using etchant that does not etch the copper foil 23 and using the protrusions as masks. An interlayer-insulating layer 27 is formed on a surface of the copper foil 23, on which the protrusions 25 are formed, so that the protrusions are connected to the conductor circuit. Thereby, heights of the protrusions are uniformed, and the reliability of connections can be improved.
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