• 专利标题: Ferroelectric non-volatile logic elements
  • 申请号: US10076058
    申请日: 2002-02-12
  • 公开(公告)号: US06650158B2
    公开(公告)日: 2003-11-18
  • 发明人: Jarrod Eliason
  • 申请人: Jarrod Eliason
  • 主分类号: H03K3289
  • IPC分类号: H03K3289
Ferroelectric non-volatile logic elements
摘要:
Various logic elements such as SR flip-flops, JK flip-flops, D-type flip-flops, master-slave flip-flops, parallel and serial shift registers, and the like are converted into non-volatile logic elements capable of retaining a current output logic state even though external power is removed or interrupted through the strategic addition of ferroelectric capacitors and supporting circuitry. In each case, the building blocks of a cross-coupled sense amplifier are identified within the logic element and the basic cell is modified and/or optimized for sensing performance.
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