- 专利标题: Non-volatile semiconductor memory
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申请号: US09953227申请日: 2001-09-17
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公开(公告)号: US06650570B2公开(公告)日: 2003-11-18
- 发明人: Toru Tanzawa , Shigeru Atsumi
- 申请人: Toru Tanzawa , Shigeru Atsumi
- 优先权: JP2000-288330 20000922
- 主分类号: G11C1604
- IPC分类号: G11C1604
摘要:
A non-volatile semiconductor memory comprises a memory cell array having a plurality of non-volatile memory cells, at least one reference cell, a read circuit for reading data by applying a first voltage to one of word lines to compare a current flowing through one of bit lines with a current flowing through the reference cell, an erase circuit for erasing the data by applying a voltage to at least two selected from the word lines, the bit lines, the source lines and a semiconductor region including the memory cells, first and second regulators, and an erase verify circuit for detecting whether the erase has finished by applying an output voltage of the first regulator to word lines of the memory cells to be erased, while applying an output voltage of the second regulator to a word line of the reference cell, thereby comparing a cell current of selected one of the memory cells with a cell current of the reference cell.
公开/授权文献
- US20020036925A1 Non-volatile semiconductor memory 公开/授权日:2002-03-28
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