Invention Grant
- Patent Title: Fabricating a DMOS transistor
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Application No.: US10160299Application Date: 2002-05-29
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Publication No.: US06660592B2Publication Date: 2003-12-09
- Inventor: Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng , Cheng-Tsung Ni
- Applicant: Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng , Cheng-Tsung Ni
- Priority: TW90128819A 20011121
- Main IPC: H01L21336
- IPC: H01L21336

Abstract:
Embodiment of the present invention are directed to improving the performance of a DMOS transistor. A method of fabricating a DMOS transistor comprises providing a semiconductor substrate having a gate oxide and a trenched gate, and implanting first conductive dopants into a surface of the semiconductor substrate adjacent to the trenched gate to form a first doping region. An insulating layer is deposited over the semiconductor substrate; and selectively etching the insulating layer to form a source contact window over a central portion of the first doping region and to leave an insulator structure above the trenched gate. The source contact window of the insulating layer has an enlarged top portion which is larger in size than a bottom portion of the source contact window closer to the first doping region than the enlarged top portion. The enlarged top portion is typically bowl-shaped. Second conductive dopants are implanted through the source contact window to form a second doping region in the central portion of the first doping region.
Public/Granted literature
- US20030096485A1 Fabricating a DMOS transistor Public/Granted day:2003-05-22
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