- 专利标题: Semiconductor device
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申请号: US10354122申请日: 2003-01-30
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公开(公告)号: US06671198B2公开(公告)日: 2003-12-30
- 发明人: Riichiro Takemura , Tomonori Sekiguchi , Katsutaka Kimura , Kazuhiko Kajigaya , Tsugio Takahashi
- 申请人: Riichiro Takemura , Tomonori Sekiguchi , Katsutaka Kimura , Kazuhiko Kajigaya , Tsugio Takahashi
- 优先权: JP11-344241 19991203
- 主分类号: G11C506
- IPC分类号: G11C506
摘要:
When a phase shift method is used as lithography where sense amplifiers are alternately placed in a one intersecting-point memory capable of implementing a reduction in the area of a DRAM, it was difficult to layout data lines in a boundary region between sense amplifiers and each memory array. Therefore, there is provided a semiconductor device according to the present invention. In the semiconductor device, two data lines continuous within the sub memory arrays or interposed therebetween are connected to the adjacent sense amplifiers as a system for drawing data lines from sub memory arrays (SMA) to sense amplifiers (SA) when the sense amplifiers are alternately placed. Namely, the number of data lines interposed between data lines respectively connected to two adjacent sense amplifiers is set to even numbers (0, 2, 4, . . . ). Owing to the above configuration, a break and a short circuit in a portion where a sense amplifier block and a sub memory array are connected, can be avoided, and a connection layout is facilitated.
公开/授权文献
- US20030142528A1 Semiconductor device 公开/授权日:2003-07-31
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