发明授权
US06682992B2 Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structures
有权
控制多晶硅层中的晶粒尺寸的方法和具有多晶硅结构的半导体器件
- 专利标题: Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structures
- 专利标题(中): 控制多晶硅层中的晶粒尺寸的方法和具有多晶硅结构的半导体器件
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申请号: US10147270申请日: 2002-05-15
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公开(公告)号: US06682992B2公开(公告)日: 2004-01-27
- 发明人: Peter J. Geiss , Joseph R. Greco , Richard S. Kontra , Emily Lanning
- 申请人: Peter J. Geiss , Joseph R. Greco , Richard S. Kontra , Emily Lanning
- 主分类号: H01L2120
- IPC分类号: H01L2120
摘要:
A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.
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