Invention Grant
US06682992B2 Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structures
有权
控制多晶硅层中的晶粒尺寸的方法和具有多晶硅结构的半导体器件
- Patent Title: Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structures
- Patent Title (中): 控制多晶硅层中的晶粒尺寸的方法和具有多晶硅结构的半导体器件
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Application No.: US10147270Application Date: 2002-05-15
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Publication No.: US06682992B2Publication Date: 2004-01-27
- Inventor: Peter J. Geiss , Joseph R. Greco , Richard S. Kontra , Emily Lanning
- Applicant: Peter J. Geiss , Joseph R. Greco , Richard S. Kontra , Emily Lanning
- Main IPC: H01L2120
- IPC: H01L2120

Abstract:
A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.
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