发明授权
- 专利标题： Highly-integrated flash memory and mask ROM array architecture
- 专利标题（中）： 高度集成的闪存和掩模ROM阵列架构
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申请号： US10364033申请日： 2003-02-11
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公开(公告)号： US06687154B2公开(公告)日： 2004-02-03
- 发明人: Peter W. Lee , Fu-Chang Hsu
- 申请人： Peter W. Lee , Fu-Chang Hsu
- 主分类号： G11C1604
- IPC分类号： G11C1604
摘要：
A memory cell device is achieved. The memory cell device comprises a first transistor having gate, drain, and source. A second transistor has gate, drain, and source. The first transistor drain is coupled to an array bit line. The second transistor source is coupled to an array source line. The first transistor source is coupled to the second transistor drain. The first transistor and the second transistor comprise one Flash transistor and one mask ROM transistor. The programmed state of the mask ROM transistor can be read.