- 专利标题: Method for making nanoscale wires and gaps for switches and transistors
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申请号: US10104348申请日: 2002-03-22
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公开(公告)号: US06699779B2公开(公告)日: 2004-03-02
- 发明人: Yong Chen , R. Stanley Williams
- 申请人: Yong Chen , R. Stanley Williams
- 主分类号: H01L2144
- IPC分类号: H01L2144
摘要:
A method for forming first and second linear structures of a first composition that meet at right angles, there being a gap at the point at which the structures meet. The linear structures are constructed on an etchable crystalline layer having the first composition. First and second self-aligned nanowires of a second composition are grown on this layer and used as masks for etching the layer. The self-aligned nanowires are constructed from a material that has an asymmetric lattice mismatch with respect to the crystalline layer. The gap is sufficiently small to allow one of the structures to act as the gate of a transistor and the other to form the source and drain of the transistor. The gap can be filled with electrically switchable materials thereby converting the transistor to a memory cell.
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