A semiconductor integrated circuit device includes a nonvolatile memory cell, a source of the cell receiving a ground potential, and a gate of the cell receiving a first control signal; a transistor, a source of the transistor receiving a drain potential of the cell, and a gate of the transistor receiving a second control signal; and a controller. The controller receives a third control signal generated upon detection of power-on and outputs the first and second control signals. A potential of the first control signal changes from the ground potential to a potential different from the ground potential, which is maintained during a first period of time, and a potential of the second control signal changes from the ground potential to a potential different from the ground potential, which is maintained during a second period of time.