- 专利标题: Flip chip interconnection using no-clean flux
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申请号: US09820547申请日: 2001-03-28
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公开(公告)号: US06713318B2公开(公告)日: 2004-03-30
- 发明人: Michihisa Maeda , Kenji Takahashi
- 申请人: Michihisa Maeda , Kenji Takahashi
- 主分类号: H01L2144
- IPC分类号: H01L2144
摘要:
A flip chip method of joining a chip and a substrate is described. A thermo-compression bonder is utilized to align the chip and substrate and apply a contact force to hold solder bumps on the substrate against metal bumps on the chip. The chip is rapidly heated from its non-native side by a pulse heater in the head of the bonder until the re-flow temperature of the solder bumps is reached. Proximate with reaching the re-flow temperature at the solder bumps, the contact force is released. The solder is held above its re-flow temperature for several seconds to facilitate wetting of the substrate's metal protrusions and joining. A no-clean flux that has a volatilization temperature below the melting point of the solder bumps is utilized to minimize or eliminate the need for a post interconnection de-flux operation.
公开/授权文献
- US20020142517A1 Flip chip interconnection using no-clean flux 公开/授权日:2002-10-03
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