发明授权
- 专利标题: Method for fabricating a circuit device
- 专利标题(中): 电路装置的制造方法
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申请号: US10172445申请日: 2002-06-14
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公开(公告)号: US06720209B2公开(公告)日: 2004-04-13
- 发明人: Yusuke Igarashi , Noriaki Sakamoto , Yoshiyuki Kobayashi , Takeshi Nakamura
- 申请人: Yusuke Igarashi , Noriaki Sakamoto , Yoshiyuki Kobayashi , Takeshi Nakamura
- 优先权: JPP.2001-185422 20010619
- 主分类号: H01L2148
- IPC分类号: H01L2148
摘要:
A conductive plated layer 4 is formed after through holes 21 are formed in the insulation resin 2 by using an insulation resin sheet 1 overcoated on a single side of the conductive layer 3 with insulation resin 2. A multi-layer connection structure can be achieved by the second conductive path layer 6 which is connected, in multi layers, to the first conductive path layer 5 formed by etching the conductive plated layer 4. Further, since semiconductor elements 7 are adhered to and fixed at the overcoating resin 8 that covers the first conductive path layer 5, the first conductive path layer 5 is finely patterned, and routing thereof can be made free.
公开/授权文献
- US20020192858A1 Method for fabricating a circuit device 公开/授权日:2002-12-19
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