发明授权
US06724035B2 Semiconductor memory with source/drain regions on walls of grooves
有权
半导体存储器,其沟槽壁上的源极/漏极区域
- 专利标题: Semiconductor memory with source/drain regions on walls of grooves
- 专利标题(中): 半导体存储器,其沟槽壁上的源极/漏极区域
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申请号: US09733031申请日: 2000-12-11
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公开(公告)号: US06724035B2公开(公告)日: 2004-04-20
- 发明人: Masuoka Fujio , Takuji Tanigami , Yoshihisa Wada , Kenichi Tanaka , Hiroaki Shimizu
- 申请人: Masuoka Fujio , Takuji Tanigami , Yoshihisa Wada , Kenichi Tanaka , Hiroaki Shimizu
- 优先权: JP11-352054 19991210
- 主分类号: H01L27108
- IPC分类号: H01L27108
摘要:
A process for producing a semiconductor memory device comprises the steps of: (a) forming a floating gate on a semiconductor substrate having a dielectric film; (b) forming a side wall spacer comprising an insulating film on a side wall of the floating gate; (c) forming a groove by etching the semiconductor substrate using the side wall spacer as a mask; and (d) forming a low concentration impurity layer from one side wall to a bottom surface of the groove by an oblique ion implantation to the semiconductor substrate thus resulting, and forming a high concentration impurity layer from the other side wall to the bottom surface of the groove by in inverse oblique ion implantation.