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US06737699B2 Enhanced on-chip decoupling capacitors and method of making same 有权
增强片上去耦电容及其制作方法

Enhanced on-chip decoupling capacitors and method of making same
Abstract:
An apparatus including a capacitor formed between metallization layers on a circuit, the capacitor including a bottom electrode coupled to a metal layer and a top electrode coupled to a metal via wherein the capacitor has a corrugated sidewall profile. A method including forming an interlayer dielectric including alternating layers of dissimilar dielectric materials in a multilayer stack over a metal layer of a device structure; forming a via having a corrugated sidewall; and forming a decoupling capacitor stack in the via that conforms to the sidewall of the via.
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