Invention Grant
- Patent Title: Circuit for reducing pin count of a semiconductor chip and method for configuring the chip
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Application No.: US10287528Application Date: 2002-11-05
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Publication No.: US06741097B2Publication Date: 2004-05-25
- Inventor: William Lo
- Applicant: William Lo
- Main IPC: H03K19173
- IPC: H03K19173

Abstract:
A circuit that reduces external terminal count of a semiconductor chip, such as a communications chip or other type of chip that requires the generation of configuration codes, by reducing the number of external input terminals required for generating the configuration data. The circuit includes multiplexers, each of which selects output data or configuration data, and includes an output in communication with a respective external output terminal of the chip. A selector is connectable between a selected one of the external output terminals and an external input terminal in communication with a memory to serially input configuration data on that output terminal to the memory to configure the chip. Thus, configuration codes are generated for the chip using a reduced number of external input terminals, thereby reducing the overall external terminal count of the chip. The circuit and chip may be embodied on a network or Ethernet card.
Public/Granted literature
- US20030057998A1 Circuit for reducing pin count of a semiconductor chip and method for configuring the chip Public/Granted day:2003-03-27
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