发明授权
US06754112B2 Integrated circuit devices having delay circuits for controlling setup/delay times of data signals that are provided to memory devices
有权
具有用于控制提供给存储器件的数据信号的设置/延迟时间的延迟电路的集成电路器件
- 专利标题： Integrated circuit devices having delay circuits for controlling setup/delay times of data signals that are provided to memory devices
- 专利标题（中）： 具有用于控制提供给存储器件的数据信号的设置/延迟时间的延迟电路的集成电路器件
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申请号： US10074309申请日： 2002-02-11
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公开(公告)号： US06754112B2公开(公告)日： 2004-06-22
- 发明人: Young-man Ahn , Jin-ho So , Byung-se So , Seung-jin Seo
- 申请人： Young-man Ahn , Jin-ho So , Byung-se So , Seung-jin Seo
- 优先权： KR2001-8141 20010219
- 主分类号： G11C722
- IPC分类号： G11C722
摘要：
An integrated circuit device includes a delay circuit that is configured to delay a clock signal and is further configured to generate an output data signal in response to the delayed clock signal and an input data signal. Multiple devices are configured to respectively receive the output data signal in response to the clock signal.
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