发明授权
US06773930B2 Method of forming an FeRAM capacitor having a bottom electrode diffusion barrier
有权
形成具有底部电极扩散阻挡层的FeRAM电容器的方法
- 专利标题: Method of forming an FeRAM capacitor having a bottom electrode diffusion barrier
- 专利标题(中): 形成具有底部电极扩散阻挡层的FeRAM电容器的方法
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申请号: US10305838申请日: 2002-11-26
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公开(公告)号: US06773930B2公开(公告)日: 2004-08-10
- 发明人: Scott R. Summerfelt , Sanjeev Aggarwal , Tomojuki Sakoda , Chiu Chi , Theodore S. Moise, IV
- 申请人: Scott R. Summerfelt , Sanjeev Aggarwal , Tomojuki Sakoda , Chiu Chi , Theodore S. Moise, IV
- 主分类号: H01L2100
- IPC分类号: H01L2100
摘要:
The present invention is directed to a method of forming an FeRAM integrated circuit, which includes forming a TiAlON bottom electrode diffusion barrier layer prior to formation of the bottom electrode layer in an FeRAM capacitor stack. Subsequently, when performing the capacitor stack etch, the portion of the TiAlON diffusion barrier layer not covered by the FeRAM capacitor stack is etched substantially anisotropically due to the oxygen within the TiAlON diffusion barrier layer substantially preventing a lateral etching thereof. In the above manner, an undercut of the TiAlON diffusion barrier layer under the FeRAM capacitor stack is prevented. In another aspect of the invention, a method of forming an FeRAM capacitor comprises forming a multi-layer bottom electrode diffusion barrier layer. Such formation comprises forming a TiN layer over the interlayer dielectric layer and the conductive contact and forming a diffusion barrier layer thereover. The TiN layer at least partially fills any seam that exists within the conductive contact, thus improving a conductivity between the FeRAM capacitor and a conductive contact in the interlayer dielectric.
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